1. Field of the Invention
The present invention relates to a data storage apparatus for storing all data in a memory composed of a plurality of memory banks and for performing simultaneous reading of a desired number of pieces of data, a data storage control apparatus for use therewith, a data storage control method for use therewith, and a data storage control program for use therewith.
2. Description of the Related Art
As shown in FIG. 20, a semiconductor memory is configured to access a memory cell MC by specifying a word line WL and a bit line BL, so that data stored in the memory cell MC at a position where the activated one word line and the bit line intersect is read. % In the semiconductor memory having such a configuration, since the same bit line is shared among data of a plurality of word lines, if, as shown in FIG. 21, a plurality of word lines WL1 and WL2 are specified, the data that is output on the bit line is destroyed. For this reason, simultaneous access cannot be made to data of different word lines.
It is possible to simultaneously read data from independent memory banks. As shown in FIG. 22, as a result of dividing the memory into a plurality of memory banks BK1 to BKn and specifying a different address for each memory bank, simultaneous access can be made to data of a plurality of word lines. However, simultaneous access to data of different word lines within the memory bank cannot be made. That is, data that can be read simultaneously is data stored in the same word line from each bank, and data stored in different word lines in the same memory bank cannot be read simultaneously.
Here, the memory bank is an area having a fixed capacity, which is used as a unit for managing the memory. Therefore, access conflicts of data do not occur between independent memory banks. The memory is composed of one or more memory banks.
Hitherto, by recognizing a specific data arrangement contained in input data, for example, processing such as pattern recognition of image data and motion detection thereof, is performed.
For example, a buffer memory capable of storing image data for several lines and outputting it in units of pixels, a data processor including a plurality of processor elements capable of processing data having a width of several bits and capable of performing data processing concurrently by a plurality of processor elements, and a control information memory for storing matching reference data and control data are provided. By using a threshold value, each processor element of the data processor binarizes an image data group in a matrix with the pixel of interest being the center, which is assigned to its own element, within the image data output by the buffer memory, into object data that is divided at a bit width of a serial arrangement, which can be processed by the processor element. Each processor element then determines whether or not that data matches reference data that exists at the same format in a control information memory (for example, see Japanese Unexamined Patent Application Publication No. 2003-203236).
In the field of moving-image processing, motion, that is, the movement direction and the size (or the speed) of an object in the image that differs with respect to time, is used. For example, motion is used in motion compensation inter-frame coding in high-efficiency coding of images and in parameter control using motion in a television noise reduction apparatus by an inter-frame time domain filter. As a motion detection method for determining a motion, a block matching method is known.
In a motion detection method for detecting the motion within an image signal, the applicant of the present invention has previously proposed a motion detection method having two steps, that is, (a) a step of generating an integration value table using a matching method for each entire screen or each comparatively large block, in which one screen is divided into a plurality of portions, and extracting one or more candidate vectors for each entire screen or for each comparatively large block in which one screen is divided into a plurality of portions by using the integration value table, and (b) a step of performing matching by using the candidate vectors, and determining a motion vector for each pixel or a comparatively small block. In this two-step motion detection method, in each of the processes of the two steps, that is, representative point matching and vector assignment, in which image motion detection is performed by representative point matching in the two-step method, the desired number of pieces of pixel data in the image need to be read simultaneously (see, for example, Japanese Unexamined Patent Application Publication No. 2001-61152).
In a semiconductor memory, when each memory bank is formed by only one word line, simultaneous reading of data is possible without the data being destroyed unlike that described above. However, when the amount of data to be stored becomes enormous, the number of memory banks increases, resulting in a burden on hardware, which is not practical.
Therefore, in the conventional technology, a buffer and a cache for reading and temporarily storing data are provided, so that a desired number of pieces of data are divided a plurality of times with respect to time, and they are temporarily stored in and read from the buffer and the cache.
However, when the desired number of pieces of data increases and data input/output are performed at a higher speed, the data reading process is delayed with respect to time. In order to solve this problem, the size of the temporary storage buffer and cache can be increased, but if the area becomes larger, the hardware requirements increase.